ISCAS 2002

IEEE International Symposium

on Circuits and Systems

Sunday, 26 May 2002 - Wednesday, 29 May 2002

Scottsdale Princess Resort

Scottsdale, Arizona

ISCAS 2002 Theme: Circuits and Systems for Ubiquitous Computing







 






Power management ICs for next generation wireless applications
Dragan Maksimovic
Gabriel A. Rincon-Mora
Siamak Abedinpour
Sunday May 26, 2002, 1:30 PM - 4:45 PM


As a result of recent advances in VLSI technology such as development of advanced interconnect technology, increased wafer size, and scaling of active devices the circuit density on the wafer continues to increase. Next generation wireless applications will include much increased functionality and communication speeds. To maintain the operating life, new approaches in architecture and implementation of power management functions are required. This tutorial consists of three presentations as follows:



Power Management Model and Implementation of Power Management IC's for Next Generation Wireless Applications
Prof. Dragan Maksimovic
University of Colorado
(maksimov@colorado.edu)

To develop a system power management model, we first examine power requirements and power management techniques, including adaptive adjustments of supply and bias voltages, for the main system building blocks: base-band digital, base-band analog, display, RF analog, and FR power amplifier. The system model is completed by modeling and comparison of Low Dropout Regulators (LDO's), switched-capacitor and switching DC-DC power converters in terms of efficiency, stand-by power consumption, response speed, noise, and footprint area. This system power model is used to show how significant improvements in battery life can be achieved by top-level design and tight integration of power management functions with signal processing building blocks. Finally, aspects of practical implementation of power management ICs are discussed, including technology choices, techniques to improve efficiency and reduce stand-by power consumption, as well as emerging digital control and power integration approaches.



Integrated LDO's: From the Ground Up!
Prof. Gabriel A. Rincon-Mora
Georgia Institute of Technology
(rincon-mora@ece.gatech.edu)

The choice between using a linear regulator and its switching counterpart is predominantly dictated by the specification demanded by the system. General metrics for performance used to classify these regulators include power efficiency, noise content, accuracy performance, and load requirements. We will not only introduce and discuss the emergence of linear regulators, and LDO's, into the marketplace but also deal with the practical issues behind their design. First, a brief overview of the market is presented and gauged against the characteristics of both linear and switching regulators, while addressing their relevant tradeoffs. The operation and classification of linear regulators are then discussed, from an intuitive perspective to formalized steady-state and transient-response analyses. Ultimately, the concepts presented are used in a practical circuit to highlight important integrated circuit design tradeoffs and system issues.



Monolithic Power Management for Future Generation Mixed-Signal Integrated Circuits
Siamak Abedinpour
Arizona State University
(Siamak.Abedinpour@asu.edu)

With increasing drive towards compactness and portability in wireless applications, there is a need for high power density DC-DC converters. Distributed power supply structures are introduced, which are becoming highly desirable to meet the requirements of portable systems. Currently various blocks of a mixed-signal IC are powered by use of a multi-output centralized power management unit through PCB and VLSI interconnects. By proper placement of DC-DC converters in proximity of circuit blocks, significant reduction in power supply interconnect delay can be achieved, and the transient response of the converter is improved. We will examine the suitability for monolithic implementation of three classical DC-DC converter topologies. The most significant criteria are die area, efficiency, control complexity, and cost (standard versus custom process technology). The advantages and disadvantages of each of the competing topologies are examined in light of these requirements.

 
The 2002 IEEE International Symposium on Circuits and Systems is sponsored by:
 
    
and supported by:
Texas Instruments
 
IMPORTANT ANNOUNCEMENTS
Date     Announcement
    6 March     Preliminary conference schedule available. See "Program" area of website.
    29 January     Session information for accepted papers is now available.
    19 January     The list of accepted papers has been posted. Please see the Paper Submission page for the link.
IMPORTANT DEADLINES
Tutorial Proposal Deadline         Friday, 21 September 2001
Paper Submission Deadline         Monday, 29 October 2001
Paper Acceptance Notification         Friday, 18 January 2002
Author Registration Deadline         Friday, 1 March 2002
Final Submission Deadline         Friday, 1 March 2002
 
 
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